Yao CHEN (陈瑶)

Senior Research Scientist,

Coordinator for Hardware and Data Analytics Research Groups

Advanced Digital Sciences Center, Singapore

University of Illinois at Urbana-Champaign, IL, USA

email: yaochen@illinois.edu, yao.chen@adsc-create.edu.sg

I am a Senior Research Scientist with the Advanced Digital Sciences Center (ADSC), a research center of University of Illinois at Urbana-Champaign (UIUC) based in Singapore. Currently, I am leading the Hardware and Data Analytics groups of ADSC on quite some attractive research topics under the supervision of Prof. Deming Chen and Prof. Marianne Winslett.

I got my BS and Ph.D. degree both in Electronic Science and Technology from Nankai University in 2010 and 2016, respectively. I was also a visiting scholar of the ECE department of University of Illinois at Urbana-Champaign from 2013 to 2015.

Research Interests

  • High-performance reconfigurable computing: FPGA, embedded system, IoT, and edge computing

  • Software/hardware co-design: hardware-efficient machine learning algorithms and neural architecture search (NAS), ML/system co-design, on-device AI

  • Graph processing: efficient algorithms and hardware for large-scale graph processing

  • Electronic design automation (EDA): high level synthesis (HLS), domain-specific architecture generation

Projects & Funding

  • "Real-time deep learning networks for fraud detection in modern e-marketplace systems", AISG (SGD $3.3M: 2022-2025). [Co-PI] (Hiring!!!)

  • "OctoBrain: A privacy preserving edge-cloud collaborative learning solution for lift systems", SGCSC (SGD $178,560: 2021-2022). [PI]

  • "Software-Hardware co-design for real-time AI", TSCP. (SGD $15M: 2017-2022).

  • "High-performance and energy efficient graph processing accelerators on FPGAs", Ministry of Education Academic Research Fund (AcRF). [Collaborator]

  • "Pooling large scale heterogeneous processors", Alibaba AIR. (USD $140,000: 2017-2019). [Co-PI]

Teaching Experience

Management of Technology, National University of Singapore, School of Engineering. (2021.1 - 2021.4)

Professional Experience

Advanced Digital Sciences Center, Singapore, University of Illinois at Urbana-Champaign

  • Senior Research Scientist, Coordinator for Hardware and Data Analytics Research Groups (Jan 2022 - Present)

  • Research Scientist, Coordinator for Hardware and Data Analytics Research Groups (Jul 2020 - Dec 2021)

  • Research Scientist (May 2019 - Apr 2020)

  • PostDoc Researcher (May2018 - Apr 2019)

  • Senior Research Engineer (Jul 2016 - Apr 2018)

Professional Services

Review Editor:

    • Frontiers in Electronics

TPC Member:

    • AIOTS 2021

    • CCGRID 2021

    • AAAI 2022

Session/Comittee Chair

    • ISVLSI 2021 Registration Chair

    • ISVLSI 2019 Session Chair

    • CSCLOUD 2022 Public Chair

Reviewer

    • ACM Computing Surveys

    • IEEE Design and Test (IEEE D&T)

    • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) - IEEE Transactions on Very Large Scale Integration (VLSI) Systems (TVLSI)

    • ACM Transactions on Reconfigurable Technology and Systems (TRETS)

    • IEEE Journal on Emerging and Selected Topics in Circuits and Systems

    • IEEE Transactions on Network Science and Engineering

    • Wireless Networks

    • ACM Transactions on Design Automation of Electronic Systems (TODAES)

    • Micromachines

    • Canadian Journal of Electrical and Computer Engineering

    • CCF Transactions on High Performance Computing

    • Integration

Publications

Conference Papers (* indicates co-first authors)

  1. Xinheng Liu*, Yao Chen*, Junhao Pan, Jinjun Xiong, and Deming Chen. HiKonv: High throughput quantized convolution with novel bit-wise management and computation. In 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 2022

  2. Prakhar Ganesh*, Yao Chen*, David Yin Yang, Marianne Winslett, and Deming Chen. YOLO-ReT: Towards high accuracy real-time object detection on edge GPUs. In 2022 IEEE Winter Conference of Applications on Computer Vision (WACV), 2022

  3. Xinheng Liu, Yao Chen, Cong Hao, Ashutosh Dhar, and Deming Chen. WinoCNN: Kernel sharing winograd systolic array for efficient convolutional neural network acceleration on FPGAs. In The 32nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2022

  4. Hongshi Tan, Xinyu Chen, Yao Chen, Wengfai Wong, and Bingsheng He. ThundeRiNG: Generating multiple independent random number sequences on FPGAs. In 2021 International Conference on Supercomputing (ICS), 2021

  5. Yao Chen, Cole Hawkins, Kaiqi Zhang, Zheng Zhang, and Cong Hao. 3U-EdgeAI: Ultra-low memory training, ultra-low bitwidth quantization, and ultra-low latency acceleration. In Proceedings of the 2021 on Great Lakes Symposium on VLSI (GLSVLSI), 2021 (Invited)

  6. Lixiang Li, Yao Chen, Zacharie Zirnheld, Pan Li, and Cong Hao. MELOPPR: Software/hardware co-design for memory-efficient low-latency personalized pagerank. In Design Automation Conference (DAC), 2021

  7. Xinyu Chen, Hongshi Tan, Yao Chen, Wengfai Wong, Bingsheng He, and Deming Chen. Skew-oblivious data routing for data intensive applications on FPGAs with HLS. In Design Automation Conference (DAC), 2021

  8. Xinyu Chen, Hongshi Tan, Yao Chen, Wengfai Wong, Bingsheng He, and Deming Chen. ThunderGP: HLS-based graph processing framework on FPGAs. In Proceedings of the 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2021

  9. Cong Hao, Yao Chen, Xiaofan Zhang, Yuhong Li, Jinjun Xiong, Wen-mei Hwu, and Deming Chen. Effective algorithm-accelerator co-design for AI solutions on edge devices. In Proceedings of the 2020 on Great Lakes Symposium on VLSI (GLSVLSI), 2020

  10. Ruichu Cai, Zhihao Liang, Boyan Xu, Zijian Li, Yuexing Hao, and Yao Chen. TAG: Typeauxiliary guiding for code comment generation. In Proceedings of 58th Annual Meeting of the Association for Computational Linguistics (ACL), 2020

  11. Yao Chen, Xin Long, Jiong He, Yuhang Chen, Hongshi Tan, Zhenxiang Zhang, Marianne Winslett, and Deming Chen. HaoCL: Harnessing large-scale heterogeneous processors made easy. In International Conference on Distributed Computing Systems (ICDCS), 2020

  12. Yuhong Li, Cong Hao, Xiaofan Zhang, Xinheng Liu, Yao Chen, Jinjun Xiong, Wen mei Hwu, and Deming Chen. EDD: Efficient differentiable DNN architecture and implementation co-search for embedded AI solutions. In Design Automation Conference (DAC), 2020

  13. Xinyu Chen, Yao Chen, Ronak Bajaj, Jiong He, Bingsheng He, Weng-Fai Wong, and Deming Chen. Is FPGA useful for hash joins? Exploring hash joins on coupled CPU-FPGA architecture. In The Conference on Innovative Data Systems Research (CIDR), 2019

  14. Cong Hao, Yao Chen, Xinheng Liu, Atif Sarwari, Daryl Sew, Ashutosh Dhar, Bryan Wu, Dongdong Fu, Jinjun Xiong, Wen-mei Hwu, Junli Gu, and Deming Chen. NAIS: Neural architecture and implementation search and its applications in autonomous driving. In International Conference On Computer-Aided Design (ICCAD), 2019 (Invited)

  15. Xinyu Chen, Ronak Bajaj, Yao Chen, Jiong He, Weng-Fai Wong, Bingsheng He, and Deming Chen. On-the-fly parallel data shuffling for graph processing on OpenCL-based FPGAs. In Proceedings of the 2019 International Conference on Field-Programmable Logic and Applications (FPL), 2019

  16. Xiaofan Zhang, Cong Hao, Yuhong Li, Yao Chen, Jinjun Xiong, Wen-mei Hwu, and Deming Chen. A bi-directional co-design approach to enable deep learning on IoT devices. In Proceedings of the ICML 2019 Workshop, Joint Workshop on On-Device Machine Learning & Compact Deep Neural Network Representations, (ODML-CDNNR), 2019

  17. Yao Chen, Kai Zhang, Cheng Gong, Cong Hao, Xiaofan Zhang, Tao Li, and Deming Chen. T-DLA: An open-source deep learning accelerator for ternarized DNN models on embedded FPGA. In 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019

  18. Cheng Gong, Tao Li, Ye Lu, Cong Hao, Xiaofan Zhang, Deming Chen, and Yao Chen. μL2Q: An ultra-low loss quantization method for DNN compression. In Proceedings of the 2019 International Joint Conference on Neural Networks, (IJCNN), 2019

  19. Yao Chen, Jiong He, Xiaofan Zhang, Cong Hao, and Deming Chen. Cloud-DNN: An open framework for mapping DNN models to cloud FPGAs. In Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, (FPGA), 2019

  20. Huachao Xu, Jinlong Hu, Yao Chen, Guofeng Li, and Chao Lu. Pico-ampere voltage references for iot systems. In 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019

  21. Yao Chen, Libo Huang, Jiong He, Kunyao Zhao, Ruichu Cai, and Zhifeng Hao. HASS: High accuracy spike sorting with wavelet package decomposition and mutual information. In 2018 IEEE International Conference on Bioinformatics and Biomedicine (BIBM), Dec 2018

  22. Jiong He, Yao Chen, Tom Zhengjia Fu, Xin Long, Mariaane Winslett, Liang You, and Zhenjie Zhang. HaaS: Cloud-based real-time data analytics with heterogeneity-aware scheduling. In 2018 IEEE 38th International Conference on Distributed Computing Systems (ICDCS), 2018

  23. Huachao Xu, Yao Chen, Jinlong Hu, Hongkun Cai, Tao Du, Ke Liang, and Guofeng Li. 110pA, 170ppm/V, -77dB@100hz voltage reference for IoT systems. In 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Oct 2018

  24. Huachao Xu, Yao Chen, Jinlong Hu, Tao Du, Hongkun Cai, Ke Liang, and Guofeng Li. 73 pA, 250 ppm/v, -74db@100hz voltage reference using one type of MOSFETs. Oct 2018

  25. Jinlong Hu, Huachao Xu, Tao Du, Guofeng Li, and Yao Chen. Anovel1.03ppm/◦C wide temperature range curvature compensated bandgap voltage reference. In 2018 IEEE 2nd International Conference on Circuits, System and Simulation (ICCSS), 2018

  26. Tan Nguyen, Yao Chen, Kyle Rupnow, Swathi T. Gurumani, and Deming Chen. SoC, NoC and hierarchical bus implementations of applications on FPGAs using the FCUDA flow. In 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016

  27. Xinheng Liu, Yao Chen, Tan Nguyen, Swathi Gurumani, Kyle Rupnow, and Deming Chen. High level synthesis of complex applications: An h.264 video decoder. In Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2016

  28. Liwei Yang, Yao Chen, Wei Zuo, Tan Nguyen, Swathi T. Gurumani, Kyle Rupnow, and Deming Chen. System-level design solutions: Enabling the IoT explosion. In 2015 IEEE 11th International Conference on ASIC (ASICON), 2015

  29. Swathi T. Gurumani, Jacob Tolar, Yao Chen, Yun Liang, Kyle Rupnow, and Deming Chen. Integrated CUDA- to-FPGA synthesis with Network-on-Chip. In Proceedings of 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2014

Journal Papers (* indicates co-first authors)

  1. Xinyu Chen, Feng Cheng, Hongshi Tan, Yao Chen, Bingsheng He, Weng-Fai Wong and Deming Chen. ThunderGP: Resource-Efficient Graph Processing Framework on FPGAs with HLS. ACM Transaction on Reconfigurable Technology and Systems (TRETS), 2022

  2. Prakhar Ganesh*, Yao Chen*, Xin Lou, Mohammad Ali Khan, Yin Yang, Deming Chen, Marianne Winslett, Hassan Sajjad, and Preslav Nakov. Compressing large-scale transformer-based models: A case study on BERT. Transactions of the Association for Computational Linguistics (TACL), 2021

  3. Prakhar Ganesh, Xin Lou, Yao Chen, Rui Tan, David K.Y. Yau, Deming Chen, and Marianne Winslett. Learning-based simultaneous detection and characterization of time delay attack in cyber-physical systems. IEEE Transactions on Smart Grid (TSG), 2020

  4. Cheng Gong, Yao Chen, Ye Lu, Tao Li, Cong Hao, and Deming Chen. Vecq: Minimal loss DNN model compression with vectorized weight quantization. IEEE Transactions on Computers (TC), 2020

  5. Libo Huang, Bingo Wing-Kuen Ling, Ruichu Cai, Yan Zeng, Jiong He, and Yao Chen. WMsorting: Wavelet packets decomposition and mutual information based spike sorting method. IEEE Transactions on NanoBioscience, 2019

  6. Jihe Wang, Danghui Wang, Meikang Qiu, Yao Chen, and Bing Guo. A locality-aware shuffle optimization on fat-tree data centers. Future Generation Computer Systems (FGCS), 89:31 – 43, 2018

  7. Ying Chen, Tan Nguyen, Yao Chen, Swathi T. Gurumani, Yun Liang, Kyle Rupnow, Jason Cong, Wen-mei Hwu, and Deming Chen. FCUDA-HB: Hierarchical and scalable bus architecture generation on FPGAs with the FCUDA flow. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 35(12):2032–2045, 2016

  8. Yao Chen, Swathi Gurumani, Yun Liang, Guofeng Li, Donghui Guo, Kyle Rupnow, and Deming Chen. FCUDA-NoC: A scalable and efficient network-on-chip implementation for the CUDA-to-FPGA flow. IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 24(6):2220–2233, June 2016

Patents & Software License

  • 2021 "Low Loss DNN Quantization Software" licensed to local company at a price of SGD 2.5K/year

  • R. Cai, K. Zhao, J. He, Y. Chen, Z. Hao, W. Wen, B. Chen, "A GPU acceleration method for spike sorting", patent No. CN109460785A

  • R. Cai, K. Zhao, J. He, Y. Chen, Z. Hao, W. Wen, B. Chen, "A CUDA based spike sorting acceleration method on GPU", patent No. CN109376651A

  • C. Lin, Z. Guo, H. Xu, Y. Chen, K. Liang, G. Li, “Bi-CMOS based Fifth Order High Accuracy Temperature Compensated Circuit”, 201610443932.2

  • C. Lin, Z. Guo, H. Xu, K. Liang, Y. Chen, G. Li, “Fifth Order High Accuracy Temperature Compensated Crystal Oscillator ASIC Design”, 201610443932.2

  • X. Gao, L. Wang, Y. Chen, “Nandflash Based Data Acquisition System”, patent No. CN20111005119.8

  • Y. Chen, P. Chang, L. Wang, R. Chen, H. Wu, “IC Card Identity Authentication System Used in Public Transportation”, patent No. ZL200810152397.0